发明名称 AREA EFFICIENT PARALLEL TURBO DECODING
摘要 Turbo decoders may have large decoding latency and low throughput due to iterative decoding. One way to increase the throughput and reduce the latency of turbo decoders is to use high speed decoding schemes. In particular, area-efficient parallel decoding schemes may be used to overcome the decoding latency and throughput associated with turbo decoders. In addition, hybrid parallel decoding schemes may be used in high-level parallelism implementations. Moreover, the area-efficient parallel decoding schemes introduce little or no performance degradation.
申请公布号 WO02089331(A2) 申请公布日期 2002.11.07
申请号 WO2002US13365 申请日期 2002.04.30
申请人 REGENTS OF THE UNIVERSITY OF MINNESOTA;WANG, ZHONGFENG;PARHI, KESHAB, K. 发明人 WANG, ZHONGFENG;PARHI, KESHAB, K.
分类号 H03M13/29;H03M13/39;H04L1/00 主分类号 H03M13/29
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