发明名称 MODIFICATION TO FILL LAYERS FOR INLAYING SEMICONDUCTOR PATTERNS
摘要 <p>The invention provides a method of fabricating semiconductor chips that includes modifying physical properties of selected deposited fill layers over patterns having up-features and down-features, with fill to be retained in down-features. The modification enhances chemical mechanical polishing rates, or other polishing, of the modified fill layers to reduce dishing of fill material and achieves this without substantially affecting the electrical properties of the final semiconductor chip product. The invention also provides intermediate chip products and final chip products of the method.</p>
申请公布号 WO2002089181(A2) 申请公布日期 2002.11.07
申请号 US2001051639 申请日期 2001.10.26
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