CIRCUIT FOR SELECTING INTERRUPT REQUESTS IN RISC MICROPROCESSORS

摘要

An apparatus and method for prioritizing interrupt requests in a RISC processor. By utilizing hardware to prioritize the requests, processor time is reduced. The acknowledge signal (Ack(0)-Ack(n)) from a priority resolve circuit (50) selects the given service routine entry to branch instruction generating circuit (56, 58). A lower priority service routine can be interrupted by a higher priority request.