发明名称 EXPANDED FUNCTIONALITY OF PROCESSOR OPERATIONS WITHIN A FIXED WIDTH INSTRUCTION ENCODING
摘要 An apparatus for executing fixed width instructions in a multiple execution unit system has a means for fetching instructions from memory 24, and a decoder 26 for decoding each fetched instruction in turn. A determination is made as to whether each decoded instruction includes a portion to fetch a locally stored instruction from a local store 28. If it does, the locally stored instruction is fetched and the decoded and locally stored instruction portion are executed 30.
申请公布号 WO02086701(A1) 申请公布日期 2002.10.31
申请号 WO2002GB01883 申请日期 2002.04.23
申请人 IMAGINATION TECHNOLOGIES LIMITED;WEBBER, ANDREW 发明人 WEBBER, ANDREW
分类号 G06F9/30;G06F9/318;G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/30
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