发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device, having a test circuit which can analyze replacing a defective memory cell with a redundant memory cell. SOLUTION: A built-in self-test circuit 300 and a built-in redundancy analyzing circuit 400 are respectively provided in a plurality of DRAM cores 100.1-100.n. The built-in redundancy analysis circuit 400 determines a defective address to be replaced by a plurality of spare memory cell rows and spare memory cell columns, according to the detected result of an address signal from the built-in self-testing circuit 300 and a defective memory cell. The built-in redundancy analysis circuit 400 restricts an effective use region of an address storage circuit which stores the defective address, according to the capacity of a DRAM core to be tested.
申请公布号 JP2002319298(A) 申请公布日期 2002.10.31
申请号 JP20010152147 申请日期 2001.05.22
申请人 MITSUBISHI ELECTRIC CORP 发明人 OTANI JUN;OISHI TSUKASA;HIDAKA HIDETO;KAWAGOE TOMOYA
分类号 G01R31/28;G11C11/401;G11C15/04;G11C29/00;G11C29/02;G11C29/04;G11C29/12;G11C29/44;H01L21/822;H01L27/04;H01L27/10;(IPC1-7):G11C29/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址