发明名称 SIGNAL PROCESSOR
摘要 <p>An object of the present invention is to provide a signal processor which improves the offset accuracy of a video signal without increasing the number of bits of a circuit. An N-bit adder (103) adds a video signal (S101) and an upper-N-bit signal of a brightness control signal (S102) as an offset value. A 1-bit pulse generator (107) generates a 1-bit pulse signal (S107) in which "1" and "0" have equal chances of appearing at random. A selector (106) selects the 1-bit pulse signal (S107) when the LSB of the brightness control signal (S102) is "1", while selects a ground level "0" when the LSB is "0", and supplies the selected signal to a carry input of the N-bit adder (103). &lt;IMAGE&gt;</p>
申请公布号 EP1253579(A1) 申请公布日期 2002.10.30
申请号 EP20010900697 申请日期 2001.01.12
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 SUZUKI, HIDETOSHI;ISIHIKAWA, KATSUYA;ITO, KEIICHI;KUNITANI, HISAO
分类号 G09G5/10;H04N5/57;(IPC1-7):G09G5/10 主分类号 G09G5/10
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