发明名称 Method of accurate simulation of logic circuits
摘要 The present invention relates to a logic simulation method, in which a signal is switched between two logic states to simulate a transition of a real signal. The method comprises the step of inserting between the two logic states of the signal an intermediate state for a time interval indicative of the slope of the transition of the real signal.
申请公布号 US6473725(B1) 申请公布日期 2002.10.29
申请号 US19980022570 申请日期 1998.02.12
申请人 SGS-THOMAS MICROELECTRONIS S.A. 发明人 SCHOELLKOPF JEAN-PIERRE;HANRIAT STEPHANE
分类号 G06F17/50;(IPC1-7):G06F9/455 主分类号 G06F17/50
代理机构 代理人
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