发明名称 Method and system for managing timing error information
摘要 The present invention relates to a timing error information managing system. This system comprises a timing error information file, a circuit information file, a correlating section for establishing a correlation between each of timing errors in the timing error information file and each of circuit configurations in the circuit information file, and for adding a circuit information pointer to the timing error information file and further for adding an error information pointer to the circuit information file, and a managing section for managing information on timing errors through the use of the circuit information pointer and the error information pointer. This configuration allows high-efficiency management of the timing error in formation, thereby achieving the speed-up of various kinds of processing using timing error information.
申请公布号 US6473874(B1) 申请公布日期 2002.10.29
申请号 US19990431461 申请日期 1999.11.01
申请人 FUJITSU LIMITED 发明人 TAKEYAMA HIROJI
分类号 G06F17/50;(IPC1-7):G06F11/00 主分类号 G06F17/50
代理机构 代理人
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