发明名称 Single clock reference for compressed domain processing systems with interspersed transport packets
摘要 A system and method for generating a transport packet stream having an output formatted as an ASI group having a plurality of short and long ASI packets in a fixed sequence. The short and long ASI packet each have an associated transport packet and a fixed number of special idle characters and the transport packets are dispersed among the special idle characters.
申请公布号 US6473007(B2) 申请公布日期 2002.10.29
申请号 US20010912432 申请日期 2001.07.25
申请人 LEITCH INCORPORATED 发明人 LYONS PAUL W.;ACAMPORA ALFONSE A.;BELTZ JOHN P.
分类号 H04N7/52;(IPC1-7):H03M7/00 主分类号 H04N7/52
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