| 摘要 |
The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly, an object of the present invention is to reduce an ON voltage while ensuring a wide operating area and sustaining a high breakdown voltage. To achieve this object, a semiconductor base body is divided into a first MOS region and a second MOS region. In the first MOS region, a p base layer, an n+ emitter layer and a p+ layer are provided in an upper main surface of the semiconductor base body. In the second MOS region, a p base layer, an n layer and a p+ layer are provided. When a positive gate voltage is applied to a gate electrode in order to turn on the device, since the p base layer and the emitter electrode are cut off, a main current does not flow in the p base layer. Therefore, a hole accumulation effect is enhanced and the ON voltage is reduced. When a negative gate voltage is applied in order to turn off the device, since a channel region is inverted, the main current constituted of residual carriers flows in both p base layers. Therefore, a wide operating area is ensured. Since no n layer surrounding the p base layer exists, unlike in a CSTBT, there is no problem of degradation in breakdown voltage.
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