发明名称 Method to reduce bit line capacitance in cub drams
摘要 A new method is provided for the creation of the bit line contact plug. CUB capacitors typically are located adjacent to the bit line contact plug, a parasitic capacitance therefore exists between the CUB and the contact plug. Typical interface between the CUB and the bit line contact plug consists of a dielectric. By creating an air gap that partially replaces the dielectric between the CUB and the bit line contact plug, the dielectric constant of the interface between the bit line and the CUB is reduced, thereby reducing the parasitic coupling between the bit line contact plug and the CUB. This enables the creation of CUB capacitors of increased height, making the CUB and the therewith created DRAM devices better suited for the era of sub-micron device dimensions.
申请公布号 US6472266(B1) 申请公布日期 2002.10.29
申请号 US20010882427 申请日期 2001.06.18
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 YU CHIH-HSING;CHEN YU-SHEN
分类号 H01L21/02;H01L21/768;H01L21/8242;H01L27/108;(IPC1-7):H01L21/824 主分类号 H01L21/02
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