| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device wherein high integration by fining an IC, ability improvement, lower consumption power or the like are required in a power MOS transistor, and to provide its manufac turing method. SOLUTION: In a power MOS transistor 31, a drain lead-out region 49 is formed in a surface of a drain region 41 fitting to the width of a contact hole 48. The drain region 41 is formed deep below a gate 40. As a result, it is possible to prevent contact between a P-type channel and the drain lead-out region 49, formation of a P-type channel by inversion of an epitaxial layer 35 below the gate 40 and the like on turning the power MOS transistor 31 off and to realize high integration, ability improvement, low consumption power or the like.
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