| 摘要 |
<p>PROBLEM TO BE SOLVED: To process a conventional FFT to a 2<n> sample points by a method of high efficiency and power saving. SOLUTION: A processing means 501 and an address allocating means are provided. The address allocation and the processing of plural coefficients are executed by a method to optimize the recycle of a rotor whereby a simple address allocation method can be achieved. By processing plural coefficients while dividing the same into plural rotor groups, each rotor is accessed only once in one stage of the FFT processing, as a result, the address allocation of the coefficients can be simplified with the accumulation of a stage discrete value and a present address. This simplified address allocation method provides a simple packaging architecture of the address allocation means 502. The simple address allocation means with the minimized memory access, contributes to the improvement of the efficiency and the power saving in the embodiment of this invention.</p> |
