发明名称 ANALOG/DIGITAL CONVERTER UNIT AND ARITHMETIC UNIT EMPLOYING THE ANALOG/DIGITAL CONVERTER UNIT
摘要 PROBLEM TO BE SOLVED: To provide an analog/digital converter unit that can reduce its power consumption by varying a conversion period and a conversion timing of each channel and avoiding unnecessary conversion. SOLUTION: The analog/digital converter unit that sequentially converts an input analog signal of a plurality of channels into a digital signal, includes timing signal generating means 17, 10 that generate a prescribed number of timing signals for one period at a prescribed interval and repeat the period, a channel setting means that is synchronously with the sequence of the timing signals to set a channel at which the conversion is to be executed, and a conversion permission setting means 13 that sets either conversion permission or conversion disapproval to each channel, and selects a channel synchronously with the sequence of the timing signals and applies analog/digital conversion to the input analog signal of the selected channel when the conversion is permitted for the selected channel.
申请公布号 JP2002314418(A) 申请公布日期 2002.10.25
申请号 JP20010111236 申请日期 2001.04.10
申请人 CANON INC 发明人 SAGA YOSHIHIRO
分类号 G06F3/05;H03M1/12;H03M1/36;(IPC1-7):H03M1/12 主分类号 G06F3/05
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