发明名称 |
Phase lock loop frequency synthesis controller includes digital modulator |
摘要 |
A digital modulator particularly suitable for use in the controller for the fractional division divider in a phase lock loop of a digital frequency synthesizer includes an adder 61 receiving a control signal X and a feedback signal e and producing a multibit output that is the addition of the inputs. Output selection logic 62 receives an input derived from at least one bit of the adder output and produces a modulator output Y. A feedback path includes a latch 65 that receives a group of the bits output by the adder to produce the feedback signal.
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申请公布号 |
NZ507556(A) |
申请公布日期 |
2002.10.25 |
申请号 |
NZ19990507556 |
申请日期 |
1999.04.14 |
申请人 |
TAIT ELECTRONICS LIMITED |
发明人 |
MANN, STEPHEN IAN |
分类号 |
H03L7/197;(IPC1-7):H03L7/08 |
主分类号 |
H03L7/197 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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