发明名称 Tracing different states reached by a signal in a functional verification system
摘要 A functional verification system which provides information as to whether a signal has reached all possible states. For example, in the case of a signal with 0 and 1 as possible states, a 2 bit variable is initialized to 00. When a value of 1 is received for the signal, the first bit is set to 1 and when a value of 0 is received for the signal, the second bit is set to 1. Accordingly, by examining the two bits, one may determine whether the signal has attained one or both of 0 and 1 states.
申请公布号 US6470480(B2) 申请公布日期 2002.10.22
申请号 US20000738263 申请日期 2000.12.14
申请人 THARAS SYSTEMS, INC. 发明人 GANESAN SUBBU;BROUKHIS LEONID ALEXANDER;NARAYANASWAMY RAMESH;NIXON IAN MICHAEL
分类号 G06F17/50;(IPC1-7):G06F17/50;G01R31/317;G01R31/318;H01L25/00;H03K19/00 主分类号 G06F17/50
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