| 摘要 |
An offset window detector that senses the sum of two signals and compares the result to a reference voltage for attenuating an offset voltage and producing a desired gain. The primary design issues of the detector is to achieve a very low voltage offset and a low power dissipation. The detector is part of the offset circuits in the I/Q path of a wireless receiver. The maximum input signal and the minimum input signal are the positive and negative peak values of the in-phase or the quadrature signal paths. They are generated by a peak detector. The offset signal can be estimated by the addition of the maximum input signal with the minimum input signal. This resulting offset signal is compared to the reference voltage to determine if the resulting signal is greater than a maximum reference voltage, less than a minimum reference voltage or within the maximum and minimum voltages. A reference voltage generator creates the desired voltages within a desired tolerance.
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