发明名称 MULTILAYER INTERCONNECTION BOARD AND ITS MANUFACTURING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a multilayer interconnection board, having connection reliability and a minute-diameter via hole, and to provide a method for manufacturing the multilayer interconnection board. SOLUTION: In the multilayer interconnection board where insulating and conductor wiring layers are laminated mutually, projections 2a and 2b are formed. At the projections 2a and 2b, a periphery section of a lower pad 1 in the via hole 6 for connecting the upper and lower conductor wiring layers is higher than a pad surface.</p>
申请公布号 JP2002305269(A) 申请公布日期 2002.10.18
申请号 JP20010109500 申请日期 2001.04.09
申请人 TOPPAN PRINTING CO LTD 发明人 TSUKAMOTO TAKETO;OKUMA TAKAMASA;ONO NAOTO;SASAKI ATSUSHI;MAEHARA MASATAKA;ICHIKAWA KOJI
分类号 H01L23/12;H01L23/32;(IPC1-7):H01L23/32 主分类号 H01L23/12
代理机构 代理人
主权项
地址