| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a timer circuit capable of reducing a load of a switch circuit for switching the data path, and easily performing correction to an intended count period. SOLUTION: When a counter 116 successively performs the counting operation in a first count period and a second count period, a correction value write control unit 3 writes the correction value in a correction register 101 in response to a correction notification execution signal dec- WR- REV. A correction timing register 1 generates and outputs a signal REV- MOD for instructing the count period to be corrected. A count period control unit 119 outputs a signal CNT- UDF for indicating the operational condition of the counter 116. A correction value write control unit 3 inputs the correction value written in the correction register 102 in an adder circuit 110 by operating SWs 107 and 109 when the count periods indicated by the signals REV- MOD and the signal CNT- UDF are agreed with each other. The correction value is set in the counter 116, and the count period is corrected.</p> |
