发明名称 |
VERARBEITUNGSSYSTEM MIT AUSGERICHTETEM WORTVERZWEIGUNGSZIEL |
摘要 |
A microcontroller or processor architecture that performs word aligned multi-byte fetches but allows byte aligned instructions. Jump target addresses are word aligned, resulting in a word aligned fetch of the jump-to instruction. An assembler or compiler loads code into an instruction memory with branch instruction target addresses aligned on word boundaries. Returns from interrupts load the program counter with a complete return address which is byte aligned. |
申请公布号 |
DE69524379(T2) |
申请公布日期 |
2002.10.17 |
申请号 |
DE1995624379T |
申请日期 |
1995.08.21 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN |
发明人 |
MIZRAHI-SHALOM, ORI;KO, KUNG-LING |
分类号 |
G06F9/26;G06F9/30;G06F9/32;G06F9/38;G06F9/45;(IPC1-7):G06F9/32;G06F9/42 |
主分类号 |
G06F9/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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