ADAPTABLE CIRCUIT BLOCKS FOR USE IN MULTI-BLOCK CHIP DESIGN

摘要

Techniques for increasing flexibility in use of virtual component blocks (575) include a method for hardening a foundation block (500), a pin-unscrambling methodology for semi-hardened virtual component blocks, and parameterizable virtual component blocks. A method for hardening a foundation block (500) and utilizing it in a circuit design comprises the steps of defining a virtual component foundation block (575), hardening an anterior region of the foundation block including at least the critical timing components such as the system bus. The foundation block (575) has a "soft collar" for allowing interface parameters to be specified when the foundation block (575) is incorporated into a circuit design. In addition, the foundation block (575) may comprise an internal, hierarchical clocking scheme for even clock distribution and optimum performance. For example, all internal clock delays may be padded, except the longest one, so that the clock signal arrives at all relevant reference points within the foundation block (575) at the same time.