发明名称 |
LOW K DIELECTRIC ETCH IN HIGH DENSITY PLASMA ETCHER |
摘要 |
An integrated circuit wafer and a manufacturing process for etching low K spin-on dielectrics such as HSQ in a High Density Plasma etch reactor utilizes roof and wall temperature to improve across-the-wafer uniformity, and a mixture of C4F8 and C2F6 etch gases to eliminate mid via etch stop and to maintain selectivity over underlying etch-stop layers.
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申请公布号 |
US2002151168(A1) |
申请公布日期 |
2002.10.17 |
申请号 |
US19990326744 |
申请日期 |
1999.06.04 |
申请人 |
WANG FEI;KAI JAMES K.;HUI ANGELA T. |
发明人 |
WANG FEI;KAI JAMES K.;HUI ANGELA T. |
分类号 |
H01L21/311;H01L21/768;(IPC1-7):H01L21/476;H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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