发明名称 |
Scaled stack-gate non-volatile semiconductor memory device |
摘要 |
A scaled stack-gate non-volatile semiconductor memory device having atapered floating-gate structure is disclosed by the present invention, in which a stack-gate structure including a masking dielectric layer over a control-gate layer over an intergate dielectric layer over a tapered floating-gate layer on a thin tunneling-dielectric layer is formed on a semiconductor substrate having an active region isolated by field-oxides and is oxidized. A deeper double-diffused source region having a graded doping profile formed near a gate edge and a shallow drain diffusion region are formed as the first embodiment of the present invention. The deeper double-diffused source and drain regions having a graded doping profile formed near two gate edges are formed as the second embodiment of the present invention. The shallower double-diffused source and drain regions having a graded doping profile formed near two gate edges are formed as the third embodiment of the present invention.
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申请公布号 |
US6465837(B1) |
申请公布日期 |
2002.10.15 |
申请号 |
US20010973093 |
申请日期 |
2001.10.09 |
申请人 |
SILICON-BASED TECHNOLOGY CORP. |
发明人 |
WU CHING-YUAN |
分类号 |
H01L21/28;H01L21/336;H01L29/423;H01L29/788;(IPC1-7):H01L29/788 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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