| 摘要 |
A debugging system has a central processing unit, a register group, a tracer and a trace buffer integrated on a single semiconductor chip, a main memory for storing a target program and other data and an emulator, and the tracer is connected to a cache memory of the central processing unit and the register group through built-in signal lines patterned over the semiconductor chip so that the tracer is responsive to a high-speed data processing of the central processing unit by virtue of the built-in signal lines merely coupled with small parasitic capacitors.
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