发明名称 |
Computer storage system controller incorporating control store memory with primary and secondary data and parity areas |
摘要 |
A computer storage system includes director boards which control transfer of data to and between a host computer, a system cache memory and a disk array. The directors are provided with features which enhance system performance and reliability. A hardware emulation controller permits a high performance processor to be used with existing system circuitry. A control store memory is organized with primary and secondary data areas and primary and secondary parity areas. Data is written to both the primary and secondary areas. A read request accesses data in the primary area and performs a retry in the secondary area in the event of a parity error. A power supply system includes on-board marginable power supplies to facilitate testing and power-up by-pass circuits for protection of sensitive circuitry. A system clock configuration employs primary and secondary clocks to ensure redundancy of synchronized timekeeping.
|
申请公布号 |
US6467047(B1) |
申请公布日期 |
2002.10.15 |
申请号 |
US19990364931 |
申请日期 |
1999.07.30 |
申请人 |
EMC CORPORATION |
发明人 |
SCARINGELLA STEPHEN L.;TUNG VICTOR W.;BAUER RUDY M. |
分类号 |
G06F11/10;(IPC1-7):G06F11/10 |
主分类号 |
G06F11/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|