发明名称 ULTRAFINE MOS TRANSISTOR HAVING VERTICAL CHANNEL AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a high drive current by forming a fine channel and shallow source and drain of nm order size by utilizing a heavily doped silicon layer of a source and drain junction without separate lithographic process as a diffusion source and increasing an effective width of the channel in the same area. SOLUTION: An ultrafine MOS transistor comprises an SOI substrate including a single crystal substrate 10, an oxide film 20 formed on the substrate 10 and a first single crystal silicon layer formed on the film 20, a first silicon conductive layer 31 formed by heavily doping the first single crystal silicon layer, a source junction 80, channel 41 and drain junction 90 formed on the first silicon conductive layer 31, a gate insulating film 70 formed at the first silicon conductive layer 31, the source/drain junction and channel, a second silicon conductive layer formed at the drain junction, and a gate electrode 101 formed at a sidewall of the vertical channel.
申请公布号 JP2002299636(A) 申请公布日期 2002.10.11
申请号 JP20010392751 申请日期 2001.12.25
申请人 KOREA ELECTRONICS TELECOMMUN 发明人 CHO WONJU;LEE SEONG JAE;PARK KYOUNG WAN
分类号 H01L27/12;H01L29/78;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L27/12
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