| 摘要 |
PROBLEM TO BE SOLVED: To provide a delay circuit that prevents the output from being not inverted even when a measurement terminal is connected to a low level or high level power supply. SOLUTION: The delay circuit of this invention is added with a voltage detection circuit detecting that the measurement terminal reaches the outside of a prescribed voltage range for a specified time or over so as to surely invert the output for a delay time set by an internal delay circuit even when the measurement terminal of the delay circuit is connected to the low level power supply VSS or the high level power supply VDD.
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