发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a power management semiconductor device and an analog semiconductor device, which can be manufactured at a low cost in a short time, can be operated at a low voltage with a low power consumption, have high driving performance and a high accuracy. SOLUTION: The power management semiconductor device including a CMOS or the analog semiconductor device comprises the CMOS having a conductivity type of a gate electrode of NMOS and PMOS of a P-type unipolar polycrystal silicon, in such a manner that the PMOS is a surface channel type capable of shortening a channel and lowering a threshold value voltage, and that the NMOS is a threshold value control impurity with an arsenic having small diffusion coefficient available to a very shallow embedded channel to facilitate channel shortening and threshold voltage lowering. Further, the semiconductor device further comprises an insulating film on the gate electrode of the NMOS. Thus, the power management semiconductor device or the analog semiconductor device advantageous in the performance of a cost, the term of a construction period, and performance of the element as compared with the conventional offset structure NMOS having a P+ type polycrystal silicon gate unipole is realized.
申请公布号 JP2002299470(A) 申请公布日期 2002.10.11
申请号 JP20010106101 申请日期 2001.04.04
申请人 SEIKO INSTRUMENTS INC 发明人 KOIWA YUKIO;OSANAI JUN
分类号 H01L21/8238;H01L27/092;(IPC1-7):H01L21/823 主分类号 H01L21/8238
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