| 摘要 |
PROBLEM TO BE SOLVED: To provide a lock decision circuit for a PLL circuit that accurately detects a locked/unlocked state on the basis of a multiplied signal generated by the PLL circuit. SOLUTION: The lock discrimination circuit is provided with a comparator circuit 23 that compares whether or not a result of count by an up-down counter 24 for counting number of cycles of an output signal over a prescribed cycle period of an input signal X1 of the PLL circuit 10 is coincident with a value (a value of a multiple number latch register 22) depending on a multiple number of the PLL circuit 10 and the prescribed count period, compares whether or not a result of subtraction from the result of count every time the output signal is counted by one cycle over a succeeding count period of the input signal X1 is coincident with zero (a value of a '0' value latch register 21) and outputs a decision signal denoting a lock state when both the comparison results indicate the coincidence. |
