| 摘要 |
The invention concerns a circuit (1) for storing a binary code (B1, B2, , Bi-1, Bi, , Bn-1, Bn) in an integrated circuit chip, comprising an input terminal (2) applying a signal (E) triggering reading of the code, output terminals (31, 32, , 3i-1, 3i, , 3n-1, 3n) for delivering said binary code, first electrical paths (P1, P2, , Pi, , Pn) individually connecting said input terminal to each output terminal, each path inputting a fixed delay in the manufacture of the integrated circuit, and means (4, 51, 52, , 5i, , 5n) simultaneously integrating the binary states present in output of the electrical paths.
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