发明名称 SYSTEM INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a system integrated circuit that prevents the readout destination of restricted data stored in a memory device from being discovered even if the activity of a CPU inside a system LSI is traced. SOLUTION: A second memory stores the restricted data, which are used with a CPU 7. Readout from the second memory into a first memory is executed during the initialization of a STB(set top box) in which the system integrated circuit is built. More specifically, an initial condition management device 15, during the initialization of the STB, reads out the restricted data from memory devices 101, 111 to set the data in any of a plurality of areas in the first memory, and then instructs the CPU 7 to start its operation. Even if the activity of the CPU 7 is submitted to a reverse analysis in detail, the readout destination of the restricted data is not discovered.</p>
申请公布号 JP2002297449(A) 申请公布日期 2002.10.11
申请号 JP20010235620 申请日期 2001.08.02
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KITAMURA TOMOHIKO
分类号 G06F12/14;G06F21/06;G06F21/24;H04N5/44;H04N7/16;H04N7/173;(IPC1-7):G06F12/14 主分类号 G06F12/14
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