摘要 |
A phase synchronizer operative to establish synchronization with the phase of a received codeword is disclosed herein. The phase synchronizer includes an input shift register for receiving a sequence of bits containing the codeword. The phase synchronizer includes a first syndrome computing module, operatively coupled to the input shift register, for computing first syndromes relating to a first potential phase of the codeword. A first error detection module determines, based upon the first syndromes, a first number of errors associated with the first potential phase of the codeword. A second syndrome computing module, operatively coupled to the input shift register, computes second syndromes relating to a second potential phase of the codeword. The second syndrome computing module provides the second syndromes to a second error detection module, which determines a second number of errors associated with the second potential phase of the codeword. A comparator arrangement is provided for comparing the first number of errors and the second number of errors to a threshold value. The comparator arrangement determines that the first potential phase corresponds to a valid codeword phase when the first number of errors is less than the threshold value, and that the second potential phase corresponds to a valid codeword phase when the second number of errors is less than the threshold value.
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