发明名称 Semiconductor integrated circuit and test board
摘要 In the semiconductor integrated circuit the test controller generates test patterns for all the pins from test patterns for only pins necessary for the test. The test controller receives information on pins to be tested and first input test patterns constructed by input values and output expectation values for the pins to be tested. The test controller sets the input values or output expectation values of pins which are not to be tested to predetermined values and thereby generates a second input test pattern in which the input values or output expectation values of all the pins are set. The second input pattern is provided to the core logic. The output test pattern is obtained in exactly the reverse order.
申请公布号 US2002145441(A1) 申请公布日期 2002.10.10
申请号 US20010919838 申请日期 2001.08.02
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 SHIRAISHI JUNYA
分类号 G01R31/28;G01R31/317;G01R31/3183;G01R31/3185;G01R31/319;H01L21/822;H01L27/04;(IPC1-7):G01R31/26 主分类号 G01R31/28
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