发明名称 Gate-overlapped lightly doped drain polysilicon thin film transistor
摘要 A gate-overlapped lightly doped drain (LDD) polysilicon thin film transistor (TFT) has a transparent insulating substrate, a polysilicon layer formed on the substrate, and a gate insulating layer formed on the polysilicon layer. The polysilicon layer has a channel region, an LDD structure surrounding the channel region, and a source/drain region surrounding the LDD structure. A first gate layer is patterned on the gate insulating layer and positioned over the channel region. A second gate layer is patterned on the first gate layer and extends to cover a predetermined area of the gate insulating layer that covers the LDD structure.
申请公布号 US2002145141(A1) 申请公布日期 2002.10.10
申请号 US20010892232 申请日期 2001.06.26
申请人 CHEN CHIH-CHIANG 发明人 CHEN CHIH-CHIANG
分类号 H01L29/43;H01L21/336;H01L29/423;H01L29/49;H01L29/786;(IPC1-7):H01L29/76 主分类号 H01L29/43
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