发明名称 |
METHOD FOR THE PRODUCTION OF METALLIC BITLINES FOR MEMORY CELL ARRAYS, METHOD FOR THE PRODUCTION OF MEMORY CELL ARRAYS AND MEMORY CELL ARRAYS |
摘要 |
A method for the production of bitlines (40) for a memory cell array, firstly comprises the step of preparation of a layer structure from a substrate (10) with a transistor trough (12) implanted in a surface thereof, a memory medium layer sequence (20), provided on the surface of the substrate (10) and a gate region layer (22), provided on the memory medium layer sequence (20). Bitline recesses are generated in the gate region layer (22), extending to the memory medium layer sequence (20). Insulating separation layers (36) are then generated on lateral surfaces of the bitline recesses, whereupon a source/drain implantation (38) is carried out after a complete or partial removal of the memory medium layer sequence (20) in the region of the bitline recesses. The substrate is completely exposed in the region of the bitline recesses should this not be the case before the implantation. A metallisation is then generated on the exposed substrate for production of metallic bitlines (40). Said metallisation is insulated from the gate region layer (22) by means of the insulating separation layers (36). |
申请公布号 |
WO02080275(A2) |
申请公布日期 |
2002.10.10 |
申请号 |
WO2002EP01508 |
申请日期 |
2002.02.13 |
申请人 |
INFINEON TECHNOLOGIES AG;KAKOSCHKE, RONALD;WILLER, JOSEF |
发明人 |
KAKOSCHKE, RONALD;WILLER, JOSEF |
分类号 |
H01L27/10;H01L21/8246;H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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