发明名称 |
First-in first-out memory device and method of generating flag signal in the same |
摘要 |
A FIFO memory device includes a write address generating circuit generating a write address in response to a write clock signal and a read address generating circuit generating a read address in response to a read clock signal. A memory cell array includes a plurality of memory cells arranged between a plurality of write and read word lines and a plurality of write and read bit lines, the memory cell array storing write data in response to the write address and outputting read data in response to the read address. A flag signal generating circuit compares a next write address with a current read address to generate a full flag signal in response to the write clock signal when the next write address and the current read address are equal, and compares a current write address with a next read address to generate an empty flag signal in response to the read clock signal when the current write address and the next read address are equal.
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申请公布号 |
US6463000(B2) |
申请公布日期 |
2002.10.08 |
申请号 |
US20010950263 |
申请日期 |
2001.09.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE YOUNG JU;LIM JEUNG JOO |
分类号 |
G11C7/10;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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