发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE: A semiconductor integrated circuit device is provided to form an SRAM(static random access memory) cell of a complete CMOS(complementary metal oxide semiconductor) type that is highly integrated and has the tolerance of a soft error by increasing the capacity of a storage node of the SRAM cell. CONSTITUTION: The first silicon layer is selectively formed on the first and second semiconductor regions, respectively. A refractory metal layer is formed on a semiconductor substrate including the first silicon layer. The second silicon layer is formed on the refractory metal layer, and the second silicon layer is patterned to be a wiring type. A heat treatment is performed on the semiconductor substrate to silicidize the first silicon layer, the refractory metal layer and the second silicon layer. The refractory metal layer remaining on the semiconductor substrate is eliminated to form a wiring connecting the first and second semiconductor regions.
申请公布号 KR100357336(B1) 申请公布日期 2002.10.07
申请号 KR20020031826 申请日期 2002.06.07
申请人 HITACHI ULSI ENGINEERING CORP.;HITACHI, LTD. 发明人 IKEDA SHUJI;YAMANAKA TOSHIAKI;KIKUSHIMA KENICHI;MITANI SHINICHIRO;SATOH KAZUSHIGE;FUKAMI AKIRA;IIDA MASAYA;SHIMIZU AKIHIRO
分类号 G11C11/412;H01L21/768;H01L21/8244;H01L27/11;(IPC1-7):H01L27/11 主分类号 G11C11/412
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