发明名称 DELAY CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING THE DELAY CIRCUIT, AND DELAY METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a delay circuit that provides a delay time to an input signal without a delay and a waveform deformation or the like by a parasitic element so as to properly generate a delay signal and a delay pulse having a prescribed delay time with high accuracy, and to provide a semiconductor integrated circuit device including the delay circuit and a delay method. SOLUTION: A PMOS transistor (TR) T11 and an NMOS TR T12 of a buffer section of a selection switch section SW 11 are connected and led to an output terminal N100. The gates of the TRs T11, T12 are connected to an individual delay output terminal N100 of a delay section 100. The PMOS TR T11 is connected to a power supply voltage point VCC via a PMOS TR T13. The NMOS TR T12 is connected to a ground level point Vss via an NMOS TR T14. A control signal /S(0,0) is applied to a gate of the PMOS TR T13 and an inverse of the control signal /S(0,0) is applied to a gate of the NMOS TR T14. The TRs T13, T14 configure a selection section.</p>
申请公布号 JP2002290217(A) 申请公布日期 2002.10.04
申请号 JP20010092892 申请日期 2001.03.28
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 KOMURA KAZUFUMI;KAWAMOTO SATORU
分类号 G11C8/00;G11C11/4076;H03K5/00;H03K5/14;(IPC1-7):H03K5/14 主分类号 G11C8/00
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