发明名称 LOW POWER SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce power consumption at standby holding operation speed by providing first and second source potential varying means. SOLUTION: In a semiconductor circuit such as a micro-processor, a memory, or the like, means such as a source potential varying means, a decoder circuit, or the like are provided to realize simultaneously low power consumption and high performance, power consumption of a semiconductor circuit can be reduced and high speed performance can be kept by selectively supplying high voltage and low voltage to a circuit being in an operation state and a circuit being in a standby state respectively.
申请公布号 JP2002288984(A) 申请公布日期 2002.10.04
申请号 JP20010128431 申请日期 2001.03.22
申请人 ENOMOTO TADAYOSHI 发明人 ENOMOTO TADAYOSHI;KANO HIROAKI;OKA YOSHINORI
分类号 G11C11/413;G11C11/412;H03K19/0948;(IPC1-7):G11C11/413;H03K19/094 主分类号 G11C11/413
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