| 摘要 |
PURPOSE: A circuit for generating a driving pulse of a data bus sense amplifier is provided to change selectively a generation time of the driving pulse by changing only a signal without exchanging a circuit each test mode. CONSTITUTION: A signal of dec(0) passes through the first, the second, the third, and the fourth delay portions(dly1,dly2,dly3,dly4) after the signal of dec(0) is applied from a test mode delay calculation portion. A signal of dec(1) passes through the second, the third, and the fourth delay portions(dly2,dly3,dly4) after the signal of dec(1) is applied from the test mode delay calculation portion. A signal of dec(2) passes through the third and the fourth delay portions(dly3,dly4) after the signal of dec(2) is applied from the test mode delay calculation portion. A signal of dec(3) passes through the fourth delay portions(dly4) after the signal of dec(3) is applied from the test mode delay calculation portion. An output signal of the test mode delay calculation portion is in a state of high level until an input signal is applied. The output signal of the test mode delay calculation portion is in a state of low level after the input signal is applied.
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