Dual damascene copper gate and interconnect therefore

摘要

A method of forming a semiconductor device having a simultaneously formed gate and interconnect therefore, includes preparing a silicon substrate, including isolating active areas thereon; forming an insulating layer in a gate region of an active area; depositing a first barrier metal layer; depositing a gate place-holder layer on the first barrier metal layer; etching the gate place-holder layer and the first barrier metal layer to form a gate stack; building an oxide sidewall about the gate stack; forming a source region and a drain region in the active area; depositing an oxide layer over the structure and etching the oxide layer to form a dual damascene trench to the level of the gate place-holder and to form vias for the source region and drain region; removing the gate place-holder; depositing a second barrier metal layer; depositing copper into the dual damascene trench and the vias; and removing excess copper and all portions of the second barrier metal layer to the level of the last deposited oxide layer.