发明名称 Structures and methods to minimize plasma charging damage in silicon on insulator devices
摘要 An SOI circuit configuration effective for minimizing plasma-induced charging damage during fabrication comprises the formation of charge collectors connected to the gate electrode and the semiconductor body, wherein each one of the charge collectors have the same or substantially the same shape and dimension. A connecting structure formed between a device fabricated on SOI substrate and substrate is delayed until the latter stages of processing.
申请公布号 US2002142526(A1) 申请公布日期 2002.10.03
申请号 US20010822453 申请日期 2001.03.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KHARE MUKESH;AGNELLO PAUL D.;CHOU ANTHONY I.;HOOK TERENCE BLACKWELL;MOCUTA ANDA C.
分类号 H01L21/74;H01L29/423;H01L29/786;(IPC1-7):H01L21/00;H01L21/84;H01L27/01 主分类号 H01L21/74
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