| 摘要 |
To an interface of a liquid crystal display device which converts the number of pixels of image signals inputted from an external signal source such as a host computer into image signals having the less number of pixels and fetches the image signals into drain drivers at double edges of a clock signal of low frequency, clock surveillance means comprising a clock synthesizer and a clock comparator circuit which detects the presence or the absence of the irregularity of timing of a pixel clock signal inputted from the external signal source and outputs a determination signal of normal/irregular of the pixel clock signal are mounted. When it is determined that the pixel clock signal is irregular, the supply of the image data to the drain drivers from a parallel-serial converter is stopped so that the generation of the irregularity of display in the liquid crystal display devices can be obviated.
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