发明名称 |
Read-only memory cell for storing a logical 1/0 has a field effect transistor fitted between first and second doped regions and triggered by a gate region. |
摘要 |
A read-only memory is programmed by means of a polysilicon structure (B1) that activates/deactivates a gate region (G1) according to memory content. The polysilicon structure is a conductor structure that bridges the gate region and lies between first (D1) and second (D2) doped regions but does not connect to them electrically in order to activate the gate region.
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申请公布号 |
DE10112540(A1) |
申请公布日期 |
2002.10.02 |
申请号 |
DE20011012540 |
申请日期 |
2001.03.15 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
TADDIKEN, HANS;KUX, ANDREAS |
分类号 |
H01L21/8246;H01L27/112;(IPC1-7):H01L27/112;G11C17/12 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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