| 摘要 |
A method and apparatus for testing semiconductor devices is described. The apparatus includes a base having a pair of cavities with openings and a nested structure which fits within each cavity. The nested structure includes a fixture having an opening for insertion of a device under test (DUT) therein and a silicon substrate having electrical contacts which are held in the cavity by the future. Upper and lower pin blocks, which allow pins to extend through, fit within the cavity openings and connect with contacts of the silicon substrate, and in turn to a DUT.
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