发明名称 Discrete cosine transformation circuit
摘要 To simplify the structure of a discrete cosine transformation circuit for use in an audio recording/reproducing device. A selector can desirably supply a value "0" to an input terminal B of the adder/subtracter (80), so that an input to the adder/subtracter (80) via an input terminal A can be passed intact therethrough to be fed back thereto via the input terminal B. With this arrangement, direct connection between a multiplier to the input terminal B is unnecessary, and a selector which conventionally selects the direct connection and a loop back is also unnecessary. Further, since a selector (72) relating to proportional coefficients can desirably supply a value "1" to the multiplier (66), operand data inputted to the multiplier (66) can be supplied intact to the subsequent adder/subtracter (80) through the multiplier (66). That is, a route to the adder/subtracter (89) which does not pass through the multiplier (66) is eliminated, and thus a selector for selecting the routes which pass and does not pass through the multiplier (66) is also eliminated. Further, adjustment of an addition/subtraction order by a calculation order controlling means enables to reduce the subtraction function of the adder/subtracter (80), so that the circuit has a simpler structure.
申请公布号 US6460062(B1) 申请公布日期 2002.10.01
申请号 US19990239348 申请日期 1999.01.28
申请人 SANYO ELECTRIC CO., LTD. 发明人 MATSUI MASARU
分类号 H03M7/30;G06F17/14;(IPC1-7):G06F17/14 主分类号 H03M7/30
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