发明名称 Damascene processing employing low Si-SiON etch stop layer/arc
摘要 The dimensional accuracy of trench formation and, hence, metal line width, in damascene technology is improved by employing a low Si-SiON etch stop layer/ARC with reduced etch selectivity with respect to the overlying dielectric material but having a reduced extinction coefficient (k). Embodiments include via first-trench last dual damascene techniques employing a low Si-SiON middle etch stop layer/ARC having an extinction coefficient of about -0.3 to about -0.6, e.g., about -0.35, with reduced silicon and increased oxygen vis-à-vis a SiON etch stop layer having an extinction coefficient of about -1.1. Embodiments also include removing about 60% to about 90% of the low Si-SiON etch stop layer/ARC during trench formation, thereby reducing capacitance.
申请公布号 US6459155(B1) 申请公布日期 2002.10.01
申请号 US20000729528 申请日期 2000.12.05
申请人 ADVANCED MICRO DEVICES, INC. 发明人 SUBRAMANIAN RAMKUMAR;HOPPER DAWN M.;NGO MINH VAN
分类号 H01L21/027;H01L21/033;H01L21/768;(IPC1-7):H01L21/476;H01L23/48 主分类号 H01L21/027
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