| 摘要 |
PURPOSE: A direct memory access controller is provided to increase a transmitting speed of data by converting a DMA(Direct Memory Access) transmission mode into a burst mode and a single mode automatically regardless of a length value of data to be transmitted. CONSTITUTION: A system bus interface(10) is provided for performing an interface with respect to an address of an input/output device from a CPU, an address to be written/read by data from a memory, a length value of the data to be written/read, and a control signal being used in a DMA transmission. The first register(41) stores the address of the input/output device. The second register(42) stores an initial address of a portion to be written/read by data from the memory. The third register(43) stores a length value of the data. The fourth register(44) stores the control signal. A register control circuit(20) loads the address received through the system bus interface(10), the length value of the data, and the control signal in a proper position of the above registers(41-44). A burst/single mode control circuit(30) receives the length value of the data and the control signal from the registers(43,44), automatically converts a DMA transmission mode into a burst mode or a single mode, and performs a DMA transmitting operation in accordance with the DMA transmission mode.
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