发明名称 |
SEMICONDUCTOR MEMORY AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide an arrangement for suppressing the stripping of a lower electrode of a ferroelectric capacitive element in a region above a plug during the deposition of a PZT film or subsequent heat treatment, and a method for manufacturing a semiconductor memory. SOLUTION: A three-layer film of first metal, a metal nitride film and second metal is formed beneath the lower electrode of the ferroelectric capacitive element wherein the metal nitride film is composed of a nitride of the first or second metal. |
申请公布号 |
JP2002280523(A) |
申请公布日期 |
2002.09.27 |
申请号 |
JP20010075485 |
申请日期 |
2001.03.16 |
申请人 |
NEC CORP |
发明人 |
SHINOHARA SOTA;TAKEMURA KOICHI;TSUJITA YASUHIRO;MORI HIDEMITSU |
分类号 |
H01L21/28;H01L21/02;H01L21/8242;H01L21/8246;H01L27/105;H01L27/108;H01L27/115 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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