| 摘要 |
PROBLEM TO BE SOLVED: To manufacture a vertical power MOSFET which has low channel resistance and low on-resistance. SOLUTION: A p-type semiconductor layer serving as a p-type well region is formed on an n-type drift region (step S12), and an insulation layer serving as a gate insulation film is formed on the p-type semiconductor layer (step S14). Then, an n-type drift region 12b and an n-type source region 22 are formed (steps S18 and S22). Thus, it is possible to suppress the unevenness on the surface of a channel formation region where an inversion layer is formed, thereby improving the state of an interface between the channel formation region and the gate insulation film. Consequently, it is possible to suppress the reduction in channel mobility, thereby manufacturing the vertical power MOSFET which has the low channel resistance and the low on-resistance.
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